Job Description

Responsibilities:

• Utilize advanced technology to enhance high-performance, low-latency systems in FPGA development.
• Collaborate with team members to design and implement automated trading algorithms using FPGAs.
• Optimize performance-critical code for FPGA architectures and address low-latency trading challenges.
• Innovate next-generation algorithmic trading systems on FPGA platforms while exploring opportunities for performance enhancements.

Requirements:

• Proven development experience with FPGAs, including Verilog/VHDL, functional verification, and static timing closure.
• Proficient in scripting with Bash, TCL, and Python to streamline processes.
• Familiar with FPGA design, simulation, and verification tools such as Synopsys, Riviera, ModelSim, and Questasim, as well as FPGAs and CPLDs from Xilinx and Altera.
• Strong drive for performance enhancement and innovation, with the ability to thrive in fast-paced, mission-critical environments while maintaining meticulous attention to detail.

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